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data bus

data bus

 英

  • n.數(shù)據(jù)總線
  • 網(wǎng)絡(luò)數(shù)據(jù)線;資料匯流排;數(shù)據(jù)匯流排

英漢解釋

n.
1.
數(shù)據(jù)總線
un.
1.
數(shù)據(jù)傳送總線

例句

The data bus must go into a high-impedance state at least one cycle before output of the latest data.

這種切換數(shù)據(jù)有效數(shù)據(jù)總線至少需要一個(gè)時(shí)鐘高阻狀態(tài)

It consisted of a PC based planner and a motion card based controller, which were connected via data bus.

系統(tǒng)包括基于PC規(guī)劃器基于運(yùn)動(dòng)控制器部分兩者通過數(shù)據(jù)總線連接一起

Data bus technology is a means of communication widely used in aerocraft control system.

數(shù)據(jù)總線技術(shù)飛行器控制系統(tǒng)廣泛采用一種通訊方式

secondly , when it is two - double bus framework , the utilization of data bus and length of the data waiting queue will fall quickly.

第二采用總線結(jié)構(gòu)會(huì)使得總線負(fù)載大大降低等候消息隊(duì)長會(huì)大大降低

It is of course possible to read larger chunks of data on some targets with wider data bus and wider data registers .

當(dāng)然某些數(shù)據(jù)總線數(shù)據(jù)寄存目標(biāo)處理器可以一次讀取數(shù)據(jù)

Itbecomes the bottleneck of the system. In this paper, data storage structure and data bus schedule are researched.

因此本文研究另外一個(gè)重要方向芯片設(shè)計(jì)數(shù)據(jù)存儲(chǔ)結(jié)構(gòu)數(shù)據(jù)調(diào)度策略

It consists of a navigation computer and flight management computer which are interfaced to the aircraft's MIL-STD-1553B data bus.

系統(tǒng)一個(gè)導(dǎo)航計(jì)算機(jī)一個(gè)飛機(jī)控制計(jì)算機(jī)組成采用MIL-STD-1553B軍用數(shù)據(jù)接口

Input data appearing on the data bus, is written to the memory array subject to the DM input logic level appearing coincident with the data.

數(shù)據(jù)總線輸入數(shù)據(jù)是否寫入存儲(chǔ)器取決于此時(shí)DM輸入邏輯

Absrtact: High speed data bus technology is one of the core techniques in avionics.

摘要高速數(shù)據(jù)總線技術(shù)航空電子關(guān)鍵技術(shù)之一

These results can provide reference for choosing topology and the type of access couplers that may be used in optical fiber data bus.

這些結(jié)果選擇光纖數(shù)據(jù)總線拓?fù)?/c>訪問耦合提供參考

The bus is the computer parts connected by a bunch of public signal, address bus, data bus and control bus composition.

總線連接計(jì)算機(jī)部件公共信號(hào)地址總線數(shù)據(jù)總線控制總線組成

Due to the amount of accesses (synchronous) performance becomes one the most important characteristics of the enterprise data bus.

由于大量存取同步),性能成為企業(yè)數(shù)據(jù)總線重要指標(biāo)之一

The physical performance imposed by topologies and access couplers in optical fiber data bus for military vehicle is analyzed.

研究量化拓?fù)?/c>訪問耦合器對(duì)光纖網(wǎng)絡(luò)物理性能影響

In the " talk" example, the controller sends the address and command-to-talk to the talker, by using ATN and the data-bus.

例子控制器利用ATN數(shù)據(jù)總線地址命令送給

Another alternative is to directly connect the converter to the processor's data bus.

一種選擇直接轉(zhuǎn)換器處理器數(shù)據(jù)總線相連

The communication among system is provided by the data bus based on CORBA and the loose-coupling relationship is built by the news service.

通過CORBA數(shù)據(jù)總線實(shí)現(xiàn)異構(gòu)系統(tǒng)通信通過消息服務(wù)建立模塊耦合關(guān)系提高系統(tǒng)靈活性

There will be a separate data bus connecting the central processing unit to memory devices .

獨(dú)立數(shù)據(jù)總線中央處理機(jī)存儲(chǔ)器連接起來

Can check ADDRESS BUS or DATA BUS circuit open short or not.

可知ADDRESSBUSDATABUS信號(hào)本身短路情形

Necessary to do aerospace data bus.

航空航天總線必備資料。,U

The increased data bus width enables support for addressable memory space above the 4GB generally available on 32bit architectures.

增加數(shù)據(jù)總線帶寬實(shí)現(xiàn)對(duì)32架構(gòu)通常可用4GB以上尋址內(nèi)存空間支持

The bus by the data bus, the address bus and control bus composition.

總線數(shù)據(jù)總線地址總線控制總線組成

CPU first outputs the address onto the address bus, then outputs the data onto the data bus, .

第一產(chǎn)出CPU地址總線地址然后數(shù)據(jù)輸出數(shù)據(jù)總線,。

data to serial_data transform between data bus and slave port.

處理這種數(shù)據(jù)總線串行之間轉(zhuǎn)換

If you connect bit 11 of the 12-bit converter to bit 15 of the processor's data bus, the sign bit will then be in the right place.

如果12轉(zhuǎn)換第11處理器總線第15相連那么符號(hào)會(huì)處于正確位置

Data is read from the part via a 12-bit parallel data bus with standard CS and RD signals.

器件讀取數(shù)據(jù)通過具有標(biāo)準(zhǔn)CSRD信號(hào)12并行數(shù)據(jù)總線進(jìn)行

In this dissertation, the detail methods of implementing high-speed data bus system which is based on OFDM technique are researched.

本文主要對(duì)OFDM技術(shù)核心高速數(shù)據(jù)通信總線若干關(guān)鍵技術(shù)具體實(shí)現(xiàn)進(jìn)行研究

the CPU can then read the data from the data bus.

CPU可以讀取數(shù)據(jù)然后數(shù)據(jù)總線

As a result data bus is typically implemented using integration layer (Figure 1).

結(jié)果數(shù)據(jù)總線一般集成1)實(shí)現(xiàn)

the receiving device comprises a receiving antenna and is connected with the elevator main controller by a data bus;

接收裝置通過數(shù)據(jù)總線電梯控制器連接

Specification for data transfer between agricultural tractors and attached machinery (data bus protocol)

農(nóng)用拖拉機(jī)附件數(shù)據(jù)傳輸數(shù)據(jù)總線協(xié)議

Implementation of A Safety-Related Input and Output Data Bus

一種安全相關(guān)輸入輸出數(shù)據(jù)總線實(shí)現(xiàn)

Simulation of a new-type airborne fiber-optical data bus system

新型機(jī)載光纖數(shù)據(jù)總線系統(tǒng)仿真研究

Design and Implementation of X-aircraft Airborne Data Bus Multi-channel module Interface Board

飛機(jī)機(jī)載總線通道模塊接口設(shè)計(jì)實(shí)現(xiàn)

a thin film transistor formed at the intersection of the gate bus line and the data bus line;

薄膜晶體管設(shè)置柵極總線數(shù)據(jù)總線交叉

Specification for data bus interconnecting systems

數(shù)據(jù)總線連接系統(tǒng)規(guī)范

Using Abstract Factory Pattern to Develop the Airborne Data Bus Emulation

抽象工廠模式實(shí)現(xiàn)飛機(jī)機(jī)載總線仿真

Application of LAN Technology on Airborne Data Bus Simulation System

局域網(wǎng)技術(shù)機(jī)載總線仿真系統(tǒng)應(yīng)用

Research on Data Bus Transmission Concept for Missile Control System

導(dǎo)彈控制系統(tǒng)數(shù)據(jù)總線傳輸方案研究

A Preliminary Study on Architecture of Data Bus System of New Generation Avionics

新一代航空電子總線系統(tǒng)結(jié)構(gòu)研究

Agricultural tractors and machinery - Interfaces for signal transfer - Part 2: Serial Data-BUS

農(nóng)業(yè)機(jī)械拖拉機(jī).信號(hào)傳送接口.第2部分串聯(lián)數(shù)據(jù)總線